A condenser microphone includes a microphone unit configuring a kind of condenser having a diaphragm and a fixed pole placed oppositely via a spacer. As the microphone unit has very high output impedance, it requires an impedance converter for converting the output impedance to low impedance. An FET (Field-Effect Transistor) is normally used as the impedance converter.
The FETs applied to the impedance converter of the microphone unit can be roughly divided into the FET having no bias circuit including diodes and resistance elements built therein (2SK330 for instance) and the FET having the bias circuit built therein (2SK660 for instance).
Of these, the FET having no bias circuit built therein has an advantage of being able to render Idss (a drain current value when voltage between a gate and a source is 0) variable by selecting the bias circuit. However, it additionally requires the bias circuit to be externally mounted. Therefore, its unit size becomes large if applied to a small microphone unit such as a tiepin-shaped condenser microphone.
For that reason, the FET having the bias circuit built therein is preferably adopted in many cases. However, this kind of FET has fixed bias voltage and is unable to change the Idss. To secure maximum output voltage by making up for this, the circuit shown in FIG. 3 is conventionally adopted. This circuit operates from a phantom power source.
As shown in FIG. 3, the condenser microphone includes as its basic configuration a microphone unit MU, an FET Q1 as the impedance converter and an output transformer TRS connected to the phantom power source not shown via an output connector CN.
Although not shown, the microphone unit MU has a diaphragm and a fixed pole placed oppositely via a spacer therein, where the fixed pole is normally connected to a gate of the FET Q1. In the case of an electret type, an electret member is applied to one of the diaphragm and fixed pole.
The FET Q1 is a built-in bias circuit type, and includes the bias circuit combining two diodes and one resistance element between the gate and source thereof. The output connector CN includes three terminal pins of a terminal pin 1 for grounding, a terminal pin 2 of a hot side of a signal and a terminal pin 3 of a cold side of a signal, where a primary winding of the output transformer TRS is connected between the terminal pin 2 and the terminal pin 3. The terminal pin 1 is connected to the diaphragm side of the microphone unit MU by rendering an unshown unit housing as a grounding line L3 for instance.
A midpoint tap is provided to the primary winding of the output transformer TRS, and is connected to a drain of the FET Q1 via a current supply line L1 including a constant current diode D2. The source of the FET Q1 is connected to one end of a secondary winding of the output transformer TRS via an output line L2 including a resistance element R2 for output and an electrolytic capacitor C3 for AC coupling. The other end of the secondary winding is connected to the grounding line L3.
A diode D1 for keeping the voltage between the drain and the source of the FET Q1 constant and an electrolytic capacitor C2 for AC coupling are connected in parallel between the current supply line L1 and the output line L2. To secure the maximum output voltage by making up for the fixed bias voltage of the FET Q1, a transistor Q2 of an emitter follower as a current amplifier is connected between the output line L2 and the grounding line L3.
In this example, the transistor Q2 is a PNP type, and its base is connected to the source of the FET Q1 via an electrolytic capacitor C1 for AC coupling. Voltage dividing resistance elements R1 and R3 for providing predetermined base voltage to the transistor Q2 are connected between an emitter and a collector (grounding line L3) of the transistor Q2.
During operation of the microphone, a current of 2 mA, for instance, is supplied to the drain of the FET Q1 from the constant current diode D2 by means of power feeding from the phantom power source, and the voltage between the drain and the source is kept at 0.7 V or so by the diode D1.
A voice signal modulated by the output voltage of the microphone unit MU applied to the gate is outputted from the source of the FET Q1, is amplified by the transistor Q2 and outputted to an external receiver via the secondary winding of the output transformer TRS and the terminal pin 1 for grounding.
According to EIAJ RC-8162A (electric supply method of a microphone), three kinds of 12 V, 24 V and 48 V are prescribed as to the phantom power source for the condenser microphone. If the circuit is designed in favor of 11 V to address this in the case of operating the condenser microphone at voltage between 11 to 52 V for instance, the maximum output voltage when using 24 V or 48 V is kept low.
In comparison, if the circuit is designed to operate at 48 V, the maximum output voltage can be high. However, the maximum output voltage becomes extremely low at 24 V, and it no longer operates when connected to the phantom power source of 12 V.
FIG. 4 shows a graph of an input level (dBV) versus a distortion factor (THD+N level) (the distortion factor of the vertical axis is a logarithmic scale) in the case of designing a conventional condenser microphone having a circuit configuration of FIG. 3 to operate at 48 V.
In the case where the distortion factor of 1% is an upper limit of a permissible level of sound quality, a maximum output level on operating at 48 V is approximately 15.3 dBV. In the case where sensitivity S is −40 dBV/Pa, a maximum permissible input sound pressure level is approximately 149.3 dBSPL.
Next, if operated from the phantom power source of 24 V, the maximum output level is approximately 1.8 dBV. In the case where the sensitivity S is −40 dBV/Pa, the maximum permissible input sound pressure level is approximately 135.8 dBSPL.
In the case of further reducing the voltage and using the phantom power source of 12 V, it does not operate as the microphone. A cause thereof is that a collector-emitter voltage VCE of the transistor Q2 for current amplification is uniquely decided by resistance values of the voltage dividing resistance elements R1 and R3.